Introduction to using FPGA on Intel® DevCloud | oneAPI | Intel Software

Introduction to using FPGA on Intel® DevCloud | oneAPI | Intel Software


Hi, I’m Alby. In this video, I
cover how to get started with oneAPI for Intel
FPGAs using the Intel DevCloud. The Intel DevCloud is a fully
functioning development sandbox that gives users full access
to Intel hardware and oneAPI. There are Intel FPGAs installed
on the DevCloud that you can target to learn more about
the data parallel C++ language and how to optimize
your code for an FPGA. Once your design is ready,
you can deploy it on the FPGA to accelerate your workload. In order to get access
to the Intel DevCloud, you must first request it
through the Intel DevCloud Sign Up page. Once your request
is approved, you’ll receive an email with
the necessary information to sign in. Before you sign in, you must
configure the connection by performing the
following steps. Follow the link in the email
to the Intel DevCloud landing page. Navigate to Connection options. Select an appropriate
operating system under the Connect
with a Terminal. Here, we’ll be using
Linux to connect. Download your SSH key. Follow the remaining
instructions on the page to correctly
configure your SSH connection. After this, you should be
able to access the Intel DevCloud with a simple command. Once you can log into
the Intel DevCloud, you can get started with
developing for the FPGA by running some of
the provided examples. In this video, I’ll
be running through a simple vector-add example. You can get the
vector-add design we’ll be using from the download
location provided in the links. Once you’ve downloaded
the example, you’ll need to transfer
files to your home directory on the Intel DevCloud using
the following command. Once you successfully
transfer them, log into the Intel DevCloud
to start running your example. The vector-add example
comes with a makefile that you can
compile in two ways. You can compile to the CPU,
also known as emulation, in order to test the
functionality of your code and make sure that it’s
functionally correct. Or you can compile
to the FPGA platform to deploy the FPGA bitstream. Here, we’re going to be
targeting and compiling for FPGA hardware. Make sure you run all
the following steps in the directory of
the vector-add example. To compile your
vector-add design, you first need to create
a JavaScript containing everything that’s needed
to build the sample. This includes the setup
of all the environment variables, as well as the
actual compile command. This will kick off the full
report generation and hardware compile for the design. The output will be an executable
that you can run on the FPGA. Note that this process can
take several hours depending on the size and
complexity of the design. This command will queue
the sample compilation on the Intel DevCloud once
you’ve created the script. The compile job will
be placed on a queue and run automatically as soon
as a node with a specified property becomes free. The qsub command will
return immediately. However, the compile job
may take longer to complete. In order to use the FPGA
on the Intel DevCloud, you must target
specific compute nodes that have all the necessary
FPGA files installed. When you submit batch jobs
using the qsub utility, this label denotes nodes where
you can submit compile jobs. Meanwhile, use either
of these labels when you want to submit
a runtime job to a node. Only these compute nodes
meet the requirements for compiling and
running the FPGA samples. You can use the
pbsnodes utility to see the list of node properties
that you can target. You can use the qstat utility
to check the status of the job that you’ve submitted. After the job completes, you
can view the output file. You can also view
any errors that happened while running the
JavaScript within the error file. Once the hardware
compile job is finished, you need to create
a script for running the newly created executable. You also need to initialize
the variables in this script before running the sample. Here’s the command to submit the
job for running the executable. After the job completes,
you can inspect the output file to see that it
runs successfully on the FPGA. In this demo, we targeted
the FPGA hardware. You can also target
the FPGA emulator. For more details
on how to do that, please see the sample read-me
or the tutorial documentation in the links provided. Now, you’ll be able to use
FPGAs on the Intel DevCloud. To learn more about
oneAPI with Intel FPGAs, please sign up for our training. And don’t forget
to see the links provided for any resources
we mentioned in this video. Thanks for watching. [LOGO MUSIC]

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